1. Field of the Invention
The invention relates to the field of communications controller central processing unit (CPU) boards, and more particularly, to bus interface controller design in a CPU board based on an Intel 80186 CPU for systems for use with subway cars or the like.
2. Background Information
A communications control system for an advanced design subway train requires high-speed data acquisition and communication abilities. Such a system requires an ability to communicate with an on-board vehicle host computer and other communications controllers on other vehicles of the train, input/output to and from terminal devices, as well as an ability to communicate with and control slave input/output (I/O) control boards for controlling servo sub-systems of the subway vehicles. Such varied requirements have lead to compromises in communications bus design in the past, and thus limited overall system performance and efficiency when attempts to apply the existing designs to such a demanding environment have been made.
There are known a variety of buses, bus interfaces, and bus controllers in various microprocessor systems. One known industrial bus standard is the IEEE 796, or Multibus-I, and another is the IEEE 1296, or Multibus-II. "Multibus" is a trademark of the Intel Corporation for its unified bus architecture, which uses a single integrated bus for data, address and control information. The Intel Multibus architectures are used, for example, for connecting random access memory (RAM), read only memory (ROM) and input/output (I/O) boards in a microprocessor based system. The Multibus architecture provides for essentially five types of signals, including data, address, control, multilevel interrupt and timing signals. Modules connected to the bus act as either masters or slaves, masters having the ability to control the bus. Arbitration logic is provided for in the bus architecture to handle requests from multiple bus masters. Data rates on the bus are a factor of the master and slave devices data rates. The Intel type bus is generally configured with two connectors, the primary (P1) and the secondary (P2) connector. P1 connector signals include the address, data, control and interrupt signals, as well as the power supply. Most of the signals on the bus operate with negative logic, i.e., they are true when low.
The Multibus-I and Multibus-II busses are both usable with Intel IAPX 86 CPU based systems, for instance an 80186 CPU based system. Various Multibus-I and Multibus-II interfaces are known. A device attached to a Multibus-I interface has the capability to operate as a bus master and share a bus with other masters that reside on the bus. A device on the Multibus-I interface also has the capacity to generate and receive both vectored and nonvectored interrupts as well as read/write references to input/output (I/O) and memory space. Because of the bus protocol used on the Multibus-I, and other factors, it is generally suitable for communication with relatively slow slave I/O boards and the like. The Multibus-II, on the other hand, allows interprocessor communications via message passing, and is suitable for high-speed communications.
In typical Multibus-I designs, latching of data transceivers is required. Also, the existing conventional devices, for instance the Intel 8288 and 8289 bus controller and arbiter respectively, limit the achievable data throughput of the bus system. Improved performance and a marriage of Multibus-I and II capabilities in an integrated system are desirable.
A variety of serial busses and bus standards are also known, for example the RS232C and 485 serial standards. Manchester encoding is also a known technique in digital communications in which, for example, a logical "1" is represented by a bipolar coded signal of a positive pulse followed by a negative pulse, and a logical "0" by a bipolar coded signal of a negative pulse followed by a positive pulse. Manchester encoding provides for higher reliability, and is advantageous in certain applications where a line must pass through galvanic isolation devices because Manchester encoding eliminates D.C. voltage due to data logic levels on the communications line. Communication rates up to 500 Kbps over a half-duplex multidrop Manchester encoded high speed communications line are possible. Given the varied requirements of the subway train environment, the is a need for an integrated communications controller which can handle parallel communications with a host, and serial communications with are variety of devices having varying capabilities. To provide such an integrated communications controller, the conventional devices for arbitration and bus control are inadequate.
There are also know a variety of data communications standards, such as the ISO 4335 INTERNATIONAL STANDARD for data communications in the third edition dated 1987, which is hereby incorporated by reference.
An example of an application where it is contemplated the invention is particularly needed is in a Train Line monitor (TLM) system such as is shown in FIG. 3. The TLM system is a proprietary system of the assignee of the present invention which was developed in tandem with the present invention and which is used to control and monitor a multicar vehicle, e.g., a passenger or subway train, communication between cars being handled by a data packet communication network. The TLM is based in part on the ISO 4335 standard, mentioned above, and on the draft DIN 43322 GERMAN STANDARD specification for serial interfacing dated July 1988, which is hereby incorporated byreference. In this way, the various systems and sub-systems of the multi-car vehicle are monitored and controlled over the network.
Therefore, a communications controller CPU board which overcomes the above limitations and provides system design flexibility by having both Multibus-I and II interfaces, RS232 serial interfaces for terminal and other equipment, and a high speed Manchester encoded half duplex interface, on a single 80186 CPU board is proposed. The need is especially critical in real-time type applications, such as the Train Line monitor (TLM) system described above, where delays to communication can have serious consequences to the proper operation of the system.